MAX5935EAX+【PDF 15/44 页】IC CTRLR POWER QUAD 36-SSOP

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Table 2 shows the IEEE 802.3af requirement for a PSE

classifying a PD at the Power Interface (PI).

Powered State

When the part enters PWR MODE, the t

START

and t

DISC

timers are reset. Before turning on the power, the part

checks if any other port is not turning on and if the

FAULT

timer is zero. Another check is performed if the

ACD_EN bit is set; in this case, the OSC_FAIL bit must

be low (oscillator is okay) for the port to be powered.

If these conditions are met, then the part enters startup

where it turns on power to the port. An internal signal,

POK_, is asserted high when V

OUT

is within 2V from

. PGOOD_ status bits are set high if POK_ stays

high longer than t

PGOOD

. PGOOD immediately resets

when POK goes low.

The PWR_CHG bit sets when a port powers up or down.

PWR_EN sets when a port powers up and resets when a

port shuts down. The port shutdown timer lasts 0.5ms

and prevents other ports from turning off during that peri-

od, except in the case of emergency shutdowns (RESET

= L, RESET_IC = H, V

EEUVLO

, V

DDUVLO

, and TSHD).

The MAX5935 always checks the status of all ports before

turning off. A priority logic system determines the order to

prevent the simultaneous turn-on or turn-off of the ports.

The port with the lesser ordinal number gets priority over

the others (i.e., Port 1 turns on first, Port 2 second, Port 3

third and Port 4 fourth). Setting PWR_OFF_ high turns off

power to the corresponding port.

Quad Network Power Controller

for Power-Over-LAN

______________________________________________________________________________________ 15

PARAMETER

YMB L

MIN

MAX

NIT

ADDITIONAL INFORMATION

Open-Circuit Voltage

In detection mode only.

Short-Circuit Current

In detection mode only.

Valid Test Voltage

VALID

2.8

Voltage Difference Between

Test Points

TEST

Time Between Any Two Test

Points

This timing implies a 500Hz maximum probing frequency.

Slew Rate

SLEW

0.1

V/祍

i n r R i n

GOOD

26.5

i n r R i n

BAD

< 15

> 33

Open-Circuit Resistance

OPEN

500

Accept Signature

Capacitance

GOOD

150

Reject Signature

Capacitance

BAD

礔

Signature Offset Voltage

Tolerance

2.0

Signature Offset Current

Tolerance

礎

Table 1. PSE PI Detection Modes Electrical Requirement

(Table 33-2 of the IEEE 802.3af Standard)

MEASURED I

CLASS

(mA)

CLASSIFICATION

0 to 5

Class 0

> 5 and < 8

May be Class 0 and 1

8 to 13

Class 1

> 13 and < 16

May be Class 0, 1, or 2

16 to 21

Class 2

> 21 and < 25

May be Class 0, 2, or 3

25 to 31

Class 3

> 31 and <35

May be Class 0, 3, or 4

35 to 45

Class 4

> 45 and < 51

Ma be Class 0 or 4

Table 2. PSE Classification of a PD

(Table 33.4 of the IEEE 802.3af Standard)

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